design languages for embeded systems

Embedded systems are application-specific computers that interact with the physical world. Each has a diverse set of tasks to perform, and although a very flexible language might be able to handle all of them, instead a variety of problem-domain-specific languages have evolved that are easier to write, analyze, and compile.
1 Introduction
An embedded system is a computer masquerading as a non computer that must perform a small set of tasks cheaply and efficiently. A typical system might have communication, signal processing, and user interface tasks to perform. Because the tasks must solve diverse problems, a language general-purpose enough to solve them all would be difficult to write, analyze, and compile. Instead, a variety of languages have evolved, each best suited to a particular problem domain. For example, a language for signal processing is often more convenient for a particular problem than, say, assembly, but might be poor for control dominated behavior.
This paper describes popular hardware, software, dataflow, and hybrid languages, each of which excels a certain problems. Dataflow languages are good for signal processing and hybrid languages combine ideas from the other three classes.
2 Hardware Languages

Verilog and VHDL are the most popular languages for hardware description and modeling. Both model systems with discrete-event semantics that ignore idle portions of the design for efficient simulation. Both describe systems with structural hierarchy: a system consists of blocks that contain instances of primitives, other blocks, or concurrent processes. Connections are listed explicitly.
Verilog provides more primitives geared specifically toward hardware simulation. VHDL’s primitive are assignments such as a = b + c or procedural code. Verilog adds transistor and logic gate primitives, and allows new ones to be defined with truth tables. VHDL communication is more disciplined and flexible. Verilog communicates through wires or regs.

VHDL’s signals behave like wires but the resolution function may be user-defined. VHDL’s variables are local to a single process unless declared shared. Overall, Verilog is the leaner language more directly geared toward simulating digital integrated circuits. VHDL is a much larger, more verbose language capable of handing a wider class of simulation and modeling tasks.
3 Software Languages
Software languages describe sequences of instructions for a processor to execute. As such, most consist of sequences of imperative instructions that communicate through memory: an array of numbers that hold their values until changed.
The C language provides such expressions, control-flow constructs such as loops and conditionals, and recursive functions. The C++ language adds classes as a way to build new data types, templates for polymorphic code, exceptions for error handling,
3.1 Assembly Languages
An assembly language program is a list of processor instructions written in a symbolic, human-readable form. Each instruction consists of an operation such as addition along with some operands.
A processor’s assembly language is defined by its op codes, addressing modes, registers, and memories. The op code distinguishes, say, addition from conditional branch, and an addressing mode defines how and where data is gathered and stored.
3.2 The C Language
C language is a middle level language. It has been invented by DENNIS RITCHE in bell’s lab in 1972.
A ‘C’ program contains functions built from arithmetic expressions structured with loops and conditionals. Instructions in a C program run sequentially. C language consists of different types of instructions like control, decision making, instructions etc.
3.3 C++
C++ extends C with structuring mechanisms for big programs: user-defined data types, a way to reuse code with different types, namespaces to group objects and avoid accidental name collisions when program pieces are assembled, and exceptions to handle errors. The basics C++ includes classes, objects. It is object oriented programming language.
A class defines a new data type by specifying its representation and the operations that may access and modify it. Classes may be defined by inheritance, which extends and modifies existing classes. For example, a rectangle class might add length and width fields and an area method to a shape class.
The main topics consists polymorphism, encapsulation, inheritance which plays vital role in compilation of C++ programs.
3.4 Java
Sun’s Java language resembles C++ but is incompatible. Like C++, Java is object-oriented, providing classes and inheritance. It is a higher-level language than C++ since it uses object references, arrays, and strings instead of pointers. Java’s automatic garbage collection frees the programmer from memory management. Understanding threads is the core of understanding Java. Thread is a sequence of executing instructions that can run independently of other threads yet can directly share data with other threads.Java is a multithreaded language.
Java provides concurrent threads .Creating a thread involves extending the Thread class, creating instances of these objects, and calling their start methods to start a new thread of control that executes the object’s run methods.
3.5 RTOS
Many embedded systems use a real-time operating system (RTOS) to simulate concurrency on a single processor. An RTOS manages multiple running processes, each written in sequential language such as C. The processes perform the system’s computation and the RTOS schedules them- attempts to meet deadlines by deciding which process runs when. Labrosse describes the implementation of a particular RTOS.

4. Dataflow Languages
Dataflow languages describe systems of procedural processes that run concurrently and communicate through queues. Dataflow semantics are natural for expressing the block diagrams typically used to describe signal-processing algorithms, and their regularity makes dataflow implementations very efficient because otherwise costly run-time scheduling decisions can be made at compile time, even in systems containing multiple sampling rates.
4.1 Kahn Process Networks
Kahn Process Networks form a formal basis for dataflow computation. Kahn’s systems consist of processes that communicate exclusively through unbounded point-to point first-in, first-out queues. Kahn’s networks do not depend on execution speeds.


4.2 Synchronous Dataflow
Lee and Messerschmitt’s Synchronous dataflow fix the communication patterns of the blocks in a Kahn network. Each time a block runs, it consumes and produces a fixed number of data tokens on each of its ports.
5 Hybrid Languages
Hybrid languages combine ideas from others to solve different types of problems. Esterel excels at discrete control by blending software-like control flow with the synchrony and concurrency of hardware.

Communication protocols are SDL’s forte; it uses extended finite-state machines with single input queues. System C provides a flexible discrete event simulation environment built on C++.
5.1 Esterel
Intended for specifying control-dominated reactive systems, Esterel combines the control constructs of an imperative software language with concurrency, preemption, and a synchronous model of time like that used in synchronous digital circuits. In each clock cycle, the program awakens, reads its inputs, produces outputs, and suspends. An Esterel program communicates through signals that are either present or absent each cycle
5.2 SDL
SDL is a graphical specification language developed for describing telecommunication protocols defined by the ITU. A system consists of concurrently-running FSMs, each with a single input queue, connected by channels that define which messages they carry.
5.3 SystemC
The SystemC language is a C++ subset for system modeling. The SystemC language builds systems from Verilog- and VHDL-like modules. Each has a collection of I/O ports and may contain instances of other modules or processes defined by a block of C++ code. SystemC uses a discrete-event simulation model. The SystemC scheduler executes the code in a process in response to an event such as a clock signal, or a delay. This model resembles that used in Verilog and VHDL, but has the flexibility of operating with a general-purpose programming language.
5.4 Co Centric System Studio
Co Centric System Studio uses a hierarchical formalism that combines Kahn-like dataflow and hierarchical, concurrent FSMs. The FSMs resemble Harel’s State charts, but use Esterel’s synchronous semantics to ensure determinism.
A CCSS model is built hierarchically from Dataflow, AND, OR, and Gated models. Dataflow models are Kahn Process networks. The blocks may be dataflow primitives written in a C++ subset or other hierarchical models. AND models run concurrently and communicate with Esterel-like synchronous semantics. OR models are finite-state machines that may manipulate data and whose states may contain other models. Gated models contain sub-models whose execution can be temporarily suspended under external control.